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19-2326; Rev 0; 1/02
Differential LVPECL-to-LVDS Translators
General Description
The MAX9374 and MAX9374A are 2.0GHz differential LVPECL-to-LVDS translators and are designed for telecom applications. They feature 250ps propagation delay. The differential output conforms to the ANSI TIA/EIA-644 LVDS standard. The inputs are biased with internal resistors such that the output is differential low when inputs are open. An on-chip VBB reference output is available for single-ended operation. The MAX9374 is designed for low-voltage operation from a 2.375V to 2.625V power supply for use in 2.5V systems. The MAX9374A is designed for 3.0V to 3.6V operation in systems with a nominal 3.3V supply. Both devices are offered in industry-standard 8-pin SOT23 and SO packages. o 250ps (typ) Propagation Delay o 1.0ps RMS Jitter (typ) o 2.375V to 2.625V Low-Voltage Supply Range (MAX9374) o On-Chip VBB Reference for Single-Ended Input o Output Low for Open Inputs o Output Conforms to ANSI TIA/EIA-644 LVDS Standard o ESD Protection >2.0kV (Human Body Model) o Available in Small 8-Pin SOT23 Package
Features
o Guaranteed 2.0GHz Operating Frequency
MAX9374/MAX9374A
Applications
Precision Clock Buffer Low-Jitter Data Repeater Central Office Clock Distribution DSLAM/DLC Base Station Mass Storage
PART MAX9374EKA-T MAX9374ESA MAX9374AEKA-T MAX9374AESA
Ordering Information
TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 8 SOT23-8 8 SO 8 SOT23-8 8 SO TOP MARK AAKU -- AAKV --
Pin Configurations/Functional Diagrams appear at end of data sheet.
Typical Application Circuit
LVDS RECEIVER
MAX9374/MAX9374A
Z0 = 50 D LVPECL INPUT D Q Z0 = 50 Q 100
________________________________________________________________ Maxim Integrated Products
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Differential LVPECL-to-LVDS Translators MAX9374/MAX9374A
ABSOLUTE MAXIMUM RATINGS
VCC to GND...........................................................................4.0V VD, VD to GND ..............................................-0.3V to VCC + 0.3V VD to VD ................................................................................3.0V VBB Sink/Source Current.......................................................1mA Short-Circuit Duration (Q, Q to GND).........................Continuous Short-Circuit Duration (Q to Q)...................................Continuous Continuous Power Dissipation (TA = +70C) 8-Pin SOT23 (derate 8.9mW/C above +70C)............714mW 8-Pin SO (derate 5.9mW/C above +70C)..................470mW Junction-to-Ambient Thermal Resistance 8-Pin SOT23.............................................................+112C/W 8-Pin SO...................................................................+170C/W Junction-to-Ambient Thermal Resistance with 500 LFPM Airflow 8-Pin SOT23...............................................................+78C/W 8-Pin SO.....................................................................+99C/W Junction-to-Case Thermal Resistance 8-Pin SOT23...............................................................+80C/W 8-Pin SO.....................................................................+40C/W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C ESD Protection Human Body Model (D, D, Q, Q) .......................................2kV Soldering Temperature (10s) ...........................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = 2.375V to 2.625V for MAX9374, VCC = 3.0V to 3.6V for MAX9374A, 100 1% across outputs, VID = 0.095V to VCC or 3V, whichever is less, VIHD = 1.2V to VCC, VILD = GND to VCC - 0.095V, unless otherwise noted. Typical values are at VIHD = 2.0V, VILD = 1.85V, VCC = 3.3V for MAX9374A, VCC = 2.5V for MAX9374.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS -40C MIN TYP MAX MIN +25C TYP MAX MIN +85C TYP MAX UNITS
DIFFERENTIAL INPUT (D, D) High Voltage of Differential Input Low Voltage of Differential Input VIHD VILD Figure 1 Figure 1 VBB connected to D (VIL for VBB connected to D), Figure 1 VBB connected to D (VIH for VBB connected to D), Figure 1 VCC < 3.0V VCC 3.0V VIHMAX, VILMIN (Note 3) Figure 1 Figure 1 Figure 1 0.9 250 350 450 1.2 GND VCC 1.2 VCC 1.2 VCC VCC 0.095 V V
VCC GND 0.095
VCC GND 0.095
Single-Ended Input High Voltage
VIH
VCC 1.165
VCC
VCC 1.165
VCC
VCC 1.165
VCC
V
Single-Ended Input Low Voltage
VIL
VEE
VCC 1.475 VCC 3.0 150
VEE
VCC 1.475 VCC 3.0 150
VEE
VCC 1.475 VCC 3.0 150
V
Differential Input Voltage Input Current
VIHD VILD IIN
0.1 0.1 -150
0.1 0.1 -150
0.1 0.1 -150
V A
DIFFERENTIAL OUTPUT (Q, Q) Output High Voltage Output Low Voltage Differential Output Voltage VOH VOL VOD 1.6 0.9 250 350 450 1.6 0.9 250 350 450 1.6 V V mV
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Differential LVPECL-to-LVDS Translators
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.375V to 2.625V for MAX9374, VCC = 3.0V to 3.6V for MAX9374A, 100 1% across outputs, VID = 0.095V to VCC or 3V, whichever is less, VIHD = 1.2V to VCC, VILD = GND to VCC - 0.095V, unless otherwise noted. Typical values are at VIHD = 2.0V, VILD = 1.85V, VCC = 3.3V for MAX9374A, VCC = 2.5V for MAX9374.) (Notes 1, 2)
PARAMETER Change in VOD Between Complementary Output States Output Offset Voltage Change in VOS Between Complementary Output States Output Short-Circuit Current VBB AND SUPPLY Reference Voltage Supply Current VBB ICC IBB = 0.6mA (Note 4) (Note 5) VCC 1.38 16 VCC - VCC 1.26 1.38 30 18 VCC - VCC 1.26 1.38 30 20 VCC 1.26 30 V mA SYMBOL VOD VOS VOS Q or Q short to GND 1.125 CONDITIONS -40C TYP MAX 1 25 +25C TYP MAX 1 1.25 3 25 1.375 1.125 25 +85C TYP MAX 1 1.25 3 25 1.375 25 UNITS
MAX9374/MAX9374A
MIN
MIN
MIN
mV V mV
1.25 1.375 1.125 3 25
IOSC
23
30
23
30
23
30
mA
AC ELECTRICAL CHARACTERISTICS
(VCC = 2.375V to 2.625V for MAX9374, VCC = 3.0V to 3.6V for MAX9374A, 100 1% across outputs, VIHD - VILD = 0.15V to VCC or 3V, whichever is less, VIHD = 1.2V to VCC, VILD = GND to VCC - 0.15V, fIN = 1GHz, input transition time = 125ps, input duty cycle = 50%, unless otherwise noted. Typical values are at VIHD = 2.0V, VILD = 1.85V, VCC = 3.3V for MAX9374A, VCC = 2.5V for MAX9374, unless otherwise noted.) (Notes 1, 6)
PARAMETER Differential Input to Differential Output Delay Single-Ended Input to Differential Output Delay Part-to-Part Skew Added Random Jitter (Note 8) SYMBOL tPLHD, tPHLD tPLHS, tPHLS tSKPP CONDITIONS Figure 1 Figure 1 (Note 7) fIN = 1.0GHz, clock pattern fIN = 2.0GHz, clock pattern fIN = 2.0Gbps, 223 -1 PRBS pattern VOD 250mV 20% to 80%, Figure 1 2.0 0.9 0.8 -40C MIN 116 126 TYP 240 250 MAX 420 430 304 2 2 1 0.9 MIN 128 138 +25C TYP 250 250 MAX 403 415 275 2 2 1 0.9 MIN 145 155 +85C TYP 260 260 MAX 440 450 295 2 ps(RMS) 2 UNITS ps ps ps
tRJ
Added Deterministic Jitter (Note 8) Operating Frequency Output Rise/Fall Time
tDJ fMAX t R , tF
45 2.2 92
75 2.0 200
46 2.2 91
75 2.0 200
38 2.2 90
75
ps(P-P) MHz
200
ps
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Differential LVPECL-to-LVDS Translators MAX9374/MAX9374A
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.375V to 2.625V for MAX9374, VCC = 3.0V to 3.6V for MAX9374A, 100 1% across outputs, VIHD - VILD = 0.15V to VCC or 3V, whichever is less, VIHD = 1.2V to VCC, VILD = GND to VCC - 0.15V, fIN = 1GHz, input transition time = 125ps, input duty cycle = 50%, unless otherwise noted. Typical values are at VIHD = 2.0V, VILD = 1.85V, VCC = 3.3V for MAX9374A, VCC = 2.5V for MAX9374, unless otherwise noted.) (Notes 1, 6) Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Measurements are made with the device in thermal equilibrium. DC parameters are production tested at TA = +25C and guaranteed by design over the full operating temperature range. Current into a pin is defined as positive. Current out of a pin is defined as negative. Use VBB as a reference for inputs on the same device only. 100 across the outputs, all other pins open except VCC and GND. Guaranteed by design and characterization. Limits are set at 6 sigma. Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition. Device jitter added to the input signal.
Typical Operating Characteristics
(MAX9374A, 100 1% across outputs, fIN = 1GHz, input transition time = 125ps, input duty cycle = 50%, VCC = 3.3V, VIHD = 2.0V, VILD = 1.85V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
DIFFERENTIAL OUTPUT VOLTAGE (mV) 100 LOAD 22 SUPPLY CURRENT (mA) 20 18 16 14 12 10 -40 -15 10 35 60 85 TEMPERATURE (C)
MAX9374 toc01
DIFFERENTIAL OUTPUT VOLTAGE (VOD) vs. FREQUENCY
400 350 300 250 200 150 100 0.1 0 2.2 VOD 120 RANDOM JITTER (psRMS) 2 RISE/FALL TIME (ps)
MAX9374 toc02
RISE/FALL TIME vs. TEMPERATURE
MAX9374 toc03
24
3
140
100
RISE
JITTER 1
80
FALL
60
40 -40 -15 10 35 60 85 TEMPERATURE (C)
0.4
0.7
1.0
1.3
1.6
1.9
FREQUENCY (GHz)
PROPAGATION DELAY vs. HIGH VOLTAGE OF DIFFERENTIAL INPUT (VIHD)
MAX9374 toc04
PROPAGATION DELAY vs. TEMPERATURE
MAX9374 toc05
280
300
PROPAGATION DELAY (ps)
PROPAGATION DELAY (ps)
260
280
240
260
220
240
200
220
180 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 VIHD (V)
200 -40 -15 10 35 60 85 TEMPERATURE (C)
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Differential LVPECL-to-LVDS Translators
Pin Description
PIN SOT23 1 2 3 4 5 6 7 8 SO 4 5 3 2 8 7 6 1 NAME FUNCTION Reference Output Voltage. Connect to the inverting or noninverting data input to provide a reference for single-ended operation. When used, bypass with a 0.01F ceramic capacitor to VCC; otherwise, leave it open. Ground. Provide a low-impedance connection to the ground plane. Inverted LVPECL Data Input. 36.5k pullup to VCC and 75k pulldown to GND. Noninverted LVPECL Data Input. 75k pullup to VCC and 75k pulldown to GND. Positive Supply Voltage. Bypass VCC to GND with 0.1F and 0.01F ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. Noninverted LVDS Output. Typically terminate with 100 to Q. Inverted LVDS Output. Typically terminate with 100 to Q. No Connection. Not internally connected.
MAX9374/MAX9374A
VBB GND D D VCC Q Q N.C.
D VIHD - VILD D tPLH_ tPHL_
VIHD
VILD
Q VOD Q VOS
VOH
VOL
80%
80% 0 (DIFFERENTIAL) 20%
0 (DIFFERENTIAL)
20% (Q) - (Q) tR tF
Figure 1. MAX9374/MAX9374A Timing Diagram
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Differential LVPECL-to-LVDS Translators MAX9374/MAX9374A
Detailed Description
The MAX9374/MAX9374A are 2.0GHz differential LVPECL-to-LVDS translators. The output is differential LVDS and conforms to the ANSI TIA/EIA-644 LVDS standard. The inputs are biased with internal resistors such that the output is differential low when inputs are open. An on-chip VBB reference output is available for single-ended input operation. The MAX9374 is designed for low-voltage operation from 2.375V to 2.625V in systems with a nominal 2.5V supply. The MAX9374A is designed for 3.0V to 3.6V operation in systems with a nominal 3.3V supply.
Differential LVDS Output
The differential outputs conform to the ANSI TIA/EIA-644 LVDS standard. Typically, terminate the outputs with 100 across Q and Q, as shown in the Typical Application Circuit. The outputs are short-circuit protected.
Applications Information
Supply Bypassing
Bypass VCC to GND with high-frequency surface-mount ceramic 0.1F and 0.01F capacitors in parallel and as close to the device as possible, with the 0.01F capacitor closest to the device. Use multiple parallel vias to minimize parasitic inductance. When using the VBB reference output, bypass it with a 0.01F ceramic capacitor to VCC (if the VBB reference is not used, it can be left open).
Differential LVPECL Input
The MAX9374/MAX9374A accept differential LVPECL inputs and can be configured to accept single-ended inputs through the use of the VBB voltage reference output. The maximum magnitude of the differential signal applied to the input is 3.0V or VCC, whichever is less. This limit also applies to the difference between any reference voltage input and a single-ended input. Specifications for the high and low voltages of a differential input (VIHD and VILD) and the differential input voltage (VIHD - VILD) apply simultaneously.
Controlled-Impedance Traces
Input and output trace characteristics affect the performance of the MAX9374/MAX9374A. Connect high-frequency input and output signals to 50 characteristic impedance traces. Minimize the number of vias to prevent impedance discontinuities. Reduce reflections by maintaining the 50 characteristic impedance through cables and connectors. Reduce skew within a differential pair by matching the electrical length of the traces.
Single-Ended Inputs and VBB The differential inputs can be configured to accept a single-ended input through the use of the VBB reference voltage. A noninverting, single-ended input is produced by connecting VBB to the D input and applying a single-ended input signal to the D input. Similarly, an inverting input is produced by connecting VBB to the D input and applying the input signal to the D input. With a differential input configured as single ended (using VBB), the single-ended input can be driven to VCC and GND or with a single-ended LVPECL signal. Note that a single-ended input must be at least VBB 95mV or a differential input of at least 95mV to switch the outputs to the VOH and VOL levels specified in the DC Electrical Characteristics table. When using the VBB reference output, bypass it with a 0.01F ceramic capacitor to VCC. If the VBB reference is not used, leave it unconnected. Use VBB only for inputs that are on the same device as the VBB reference. Input Bias Resistors
Internal biasing resistors ensure a (differential) outputlow condition in the event that the inputs are not connected. The inverting input (D) is biased with a 36.5k pulldown to V CC and a 75k pullup to GND. The noninverting input (D) is biased with a 75k pullup to VCC and 75k pulldown to GND.
Output Termination
Terminate the outputs with 100 across Q and Q as shown in the Typical Application Circuit. Both outputs must be terminated.
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Differential LVPECL-to-LVDS Translators
Pin Configurations/Functional Diagrams
MAX9374/MAX9374A
VBB
1 75k 75k
8
N.C.
N.C.
1 75k 36.5k
8
VCC
GND
2
7
Q
D
2
7
Q
D
3 36.5k 75k
6
Q
D
3 75k 75k
6
Q
D
4
5
VCC
VBB
4
5
GND
MAX9374/MAX9374A SOT23
MAX9374/MAX9374A SO
Chip Information
TRANSISTOR COUNT: 236 PROCESS: Bipolar
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Differential LVPECL-to-LVDS Translators MAX9374/MAX9374A
Package Information
SOT23, 8L.EPS
8
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Differential LVPECL-to-LVDS Translators
Package Information (continued)
9LUCSP, 3x3.EPS
MAX9374/MAX9374A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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